(China (Mainland))
Product Summary
The EM6A9160TS-5G is a high-speed CMOS double data rate synchronous DRAM containing 128 Mbits. It is internally configured as a quad 2M x 16 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CK). The EM6A9160TS-5G provides programmable Read or Write burst lengths of 2, 4, or 8. An auto precharge function may be enabled to provide a self-timed row precharge that is initiated at the end of the burst sequence. In addition, EM6A9160TS-5G features programmable DLL option. By having a programmable mode register and extended mode register, the system can choose the most suitable modes to maximize its performance.
Parametrics
EM6A9160TS-5G absolute maximum ratings: (1)Input, Output Voltage:- 0.3V to VDD+0.3V ; (2)Power Supply Voltage:- 0.3V to 3.6V ; (3)Operating Temperature:0℃ to 70℃; (4)Storage Temperature:- 55℃ to 150℃; (5)Soldering Temperature:245℃; (6)Power Dissipation:1W ; (7)Short Circuit Output Current:50mA.
Features
EM6A9160TS-5G features: (1)Fast clock rate: 300/275/250/200MHz ; (2)Differential Clock CK & /CK ; (3)Bi-directional DQS ; (4)DLL enable/disable by EMRS ; (5)Fully synchronous operation ; (6)Internal pipeline architecture ; (7)Four internal banks, 1M x 16-bit for each bank ; (8)Programmable Mode and Extended Mode registers: /CAS Latency: 3, 4, Burst length: 2, 4, 8, Burst Type: Sequential & Interleaved ; (9)Individual byte write mask control ; (10)DM Write Latency = 0 ; (11)Auto Refresh and Self Refresh ; (12)4096 refresh cycles / 32ms ; (13)Precharge & active power down ; (14)Power supplies: VDD & VDDQ = 2.5V ± 5% ; (15)Interface: SSTL_2 I/O Interface ; (16)Package: 66 Pin TSOP II, 0.65mm pin pitch ; (17)Lead-free Package is available.
Diagrams
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